TL

Tulio Paschoalin Leao

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 Betim, BR: #1 of 18 inventorsTop 6%
Overall (All Time): #1,417,142 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
11379753 Systems and methods for command interpretation in an electronic design automation environment Gabriel Guedes de Azevedo Barbosa, Artur Melo Mota Costa, Alberto Manuel Arias Drake, Guilherme Seminotti Braga, Rodrigo Fonseca Rocha Soares +3 more 2022-07-05
11138357 Formal verification with EDA application and hardware prototyping platform Petros Daniel Fernandes de Medeiros Félix, Julia Pinheiro de Oliveira, Arthur Ribeiro Araujo, Lucas Martins Chaves, Andrei dos Santos Silva +1 more 2021-10-05
10783305 System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit design Matheus Nogueira Fonseca 2020-09-22