SS

Sudhir Kumar Katla Shetty

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
RA Rambus: 1 patents #410 of 549Top 75%
Overall (All Time): #1,371,275 of 4,157,543Top 35%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
12057192 Memory interface mapping Sreeja Menon, Charles J. Wilson, Larry Arbuthnot, Nikhil Raghavendra Rao 2024-08-06
11810633 Receiver training of reference voltage and equalizer coefficients Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed +1 more 2023-11-07
11133081 Receiver training of reference voltage and equalizer coefficients Ashwin S. M., Anirudha Shelke, Navin Kumar Mishra, Phalguni Bala, Younus Syed +1 more 2021-09-28