SR

Srinivas Suresh Revankar

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Overall (All Time): #3,074,873 of 4,157,543Top 75%
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Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
9159423 Robust erase page detection logic for NAND flash memory devices Sandeep Brahmadathan 2015-10-13