RG

Raveendra Pai Gopalakrishna

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Overall (All Time): #2,751,188 of 4,157,543Top 70%
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Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
11128410 Hardware-efficient scheduling of packets on data paths Chetan Paragaonkar, Gopi Krishnamurthy, Anish Mathew, Anujan Varma 2021-09-21