PB

Philip Henry Nils Anthony De Buren

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 San Francisco, CA: #14,272 of 26,999 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #2,059,123 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8850381 Automatic clock to enable conversion for FPGA based prototyping systems Subramanian Ganesan, Jinny Singh, David Abada 2014-09-30
8595683 Generating user clocks for a prototyping environment Subramanian Ganesan, Jinny Singh 2013-11-26