MF

Mina Adel Aziz Farhan

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 San Jose, CA: #17,604 of 32,062 inventorsTop 55%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #1,786,940 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
12141233 Method, system, and computer program product for characterizing an electronic circuit using model order reduction-based envelope fourier techniques Marco Tony Lloyd Kassis, Joel R. Phillips 2024-11-12
10860767 Systems and methods for transient simulation of circuits with mutual inductors Joel R. Phillips 2020-12-08