LC

Liang-Jih Chao

CS Cadence Design Systems: 6 patents #235 of 2,263Top 15%
📍 Fremont, CA: #2,381 of 9,298 inventorsTop 30%
🗺 California: #82,707 of 386,348 inventorsTop 25%
Overall (All Time): #739,615 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
9177093 Routing interconnect of integrated circuit designs with varying grid densities Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2015-11-03
8386984 Interconnect routing methods of integrated circuit designs Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2013-02-26
8365128 Routing interconnect of integrated circuit designs Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2013-01-29
8291365 Conditionally routing a portion of an integrated circuit design with a different pitch to overcome a design rule violation Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2012-10-16
8255857 Routing methods for integrated circuit designs Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2012-08-28
7036101 Method and apparatus for scalable interconnect solution Limin He, So-Zen Yao, Wenyong Deng, Jing Chen 2006-04-25
6367060 Method and apparatus for clock tree solution synthesis based on design constraints C.K. Cheng 2002-04-02