JG

Joseph L. Ganley

CS Cadence Design Systems: 22 patents #30 of 2,263Top 2%
📍 Herndon, VA: #36 of 878 inventorsTop 5%
🗺 Virginia: #1,083 of 34,511 inventorsTop 4%
Overall (All Time): #198,249 of 4,157,543Top 5%
22
Patents All Time

Issued Patents All Time

Showing 1–22 of 22 patents

Patent #TitleCo-InventorsDate
7398498 Method and apparatus for storing routes for groups of related net configurations Steven Teig 2008-07-08
7143382 Method and apparatus for storing routes Steven Teig 2006-11-28
7139994 Method and apparatus for pre-computing routes Steven Teig, Heng-Yi Chao 2006-11-21
7100137 Method and apparatus for quantifying the quality of placement configurations in a partitioned region of an integrated circuit layout Steven Teig 2006-08-29
7089523 Method and apparatus for using connection graphs with potential diagonal edges to model interconnect topologies during placement Steven Teig 2006-08-08
7080336 Method and apparatus for computing placement costs Steven Teig 2006-07-18
7055120 Method and apparatus for placing circuit modules Steven Teig 2006-05-30
7024650 Method and apparatus for considering diagonal wiring in placement Steven Teig 2006-04-04
6988256 Method and apparatus for pre-computing and using multiple placement cost attributes to quantify the quality of a placement configuration within a partitioned region Steven Teig 2006-01-17
6910198 Method and apparatus for pre-computing and using placement costs within a partitioned region for multiple wiring models Steven Teig 2005-06-21
6907593 Method and apparatus for pre-computing attributes of routes Steven Teig 2005-06-14
6904580 Method and apparatus for pre-computing placement costs Steven Teig 2005-06-07
6848091 Partitioning placement method and apparatus Steven Teig 2005-01-25
6826737 Recursive partitioning placement method and apparatus Steven Teig 2004-11-30
6802049 Method and apparatus for computing placement costs by calculating bend values of connection graphs that model interconnect line topologies Steven Teig 2004-10-05
6795958 Method and apparatus for generating routes for groups of related node configurations Steven Teig 2004-09-21
6687893 Method and apparatus for pre-computing routes for multiple wiring models Steven Teig 2004-02-03
6678872 Method and apparatus for using a diagonal line to measure congestion in a region of an integrated-circuit layout Steven Teig 2004-01-13
6671864 Method and apparatus for using a diagonal line to measure an attribute of a bounding box of a net Steven Teig 2003-12-30
6651233 Method and apparatus for measuring congestion in a partitioned region Steven Teig 2003-11-18
6516455 Partitioning placement method using diagonal cutlines Steven Teig 2003-02-04
6161078 Efficient method for solving systems of discrete rotation and reflection constraints 2000-12-12