JD

John Paul Decker

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
Overall (All Time): #2,072,165 of 4,157,543Top 50%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8448112 System, method, and computer program product for automatic power management verification Yaron Kashai, Neyaz Khan, Efrat Shneydor 2013-05-21
7770142 Modeling power management for an integrated circuit Arik Shmayovitsh, Dan Leibovich 2010-08-03