JP

Joel R. Phillips

CS Cadence Design Systems: 30 patents #13 of 2,263Top 1%
NC Nevermind Capital: 1 patents #6 of 15Top 40%
📍 San Jose, CA: #1,931 of 32,062 inventorsTop 7%
🗺 California: #16,431 of 386,348 inventorsTop 5%
Overall (All Time): #117,448 of 4,157,543Top 3%
31
Patents All Time

Issued Patents All Time

Showing 26–31 of 31 patents

Patent #TitleCo-InventorsDate
7533359 Method and system for chip design using physically appropriate component models and extraction Louis K. Scheffer 2009-05-12
7493240 Method and apparatus for simulating quasi-periodic circuit operating conditions using a mixed frequency/time algorithm Dan Feng, Kenneth S. Kundert 2009-02-17
7487078 Method and system for modeling distributed time invariant systems Luca Daniel 2009-02-03
7428477 Simulation of electrical circuits Baolin Yang 2008-09-23
7035782 Method and device for multi-interval collocation for efficient high accuracy circuit simulation Baolin Yang 2006-04-25
6349272 Method and system for modeling time-varying systems and non-linear systems 2002-02-19