JS

Jin-Sheng Shyr

CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
CS Chameleon Systems: 1 patents #6 of 12Top 50%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 Cupertino, CA: #3,406 of 6,989 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,598,033 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6968514 Block based design methodology with programmable components Laurence H. Cooke, Kumar Venkatramani 2005-11-22
6871341 Adaptive scheduling of function cells in dynamic reconfigurable logic 2005-03-22
6519674 Configuration bits layout Peter Lam, Dani Y. Dakhil 2003-02-11