JJ

Janez Jaklic

CS Cadence Design Systems: 8 patents #167 of 2,263Top 8%
Infineon Technologies Ag: 1 patents #4,439 of 7,486Top 60%
📍 Neubiberg, DE: #40 of 238 inventorsTop 20%
Overall (All Time): #633,534 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
10860756 Finding intersections of planar parametric curves based on error-controlled discretization 2020-12-08
10853551 System and method for offsetting and smoothing of planar region boundaries defined by arbitrary parametric curves 2020-12-01
10678986 Methods for performing Boolean operations on planar region boundaries defined by parametric curves 2020-06-09
10627713 Checking minimum width, minimum distance and maximum curvature of planar region boundaries defined by arbitrary parametric curves 2020-04-21
10620531 Error-controlled discretization of parametric curves for integrated circuit design and manufacture 2020-04-14
10185797 Methods and devices for extraction of MEMS structures from a MEMS layout 2019-01-22
8245171 Methods, systems, and computer program product for implementing interactive cross-domain package driven I/O planning and placement optimization Jean-François Alain Lepère 2012-08-14
6701492 Method for the determination of resistances and capacitances of a circuit diagram, which represents an electrical circuit Christoph Padberg, Gerd Hildebrand, Susanne Klee 2004-03-02