JC

Jaejoo Cho

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Saratoga, CA: #1,769 of 2,933 inventorsTop 65%
🗺 California: #185,134 of 386,348 inventorsTop 50%
Overall (All Time): #2,082,157 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
8601429 Method for connecting flip chip components Tao Yao, Phil Tu 2013-12-03
7871831 Method for connecting flip chip components Tao Yao, Phil Tu 2011-01-18