JP

Jean-Jacques Pairault

BS Bull Sas: 4 patents #26 of 292Top 9%
BS Bull S.A.: 2 patents #69 of 402Top 20%
📍 Boulogne-Billancourt, FR: #61 of 643 inventorsTop 10%
Overall (All Time): #854,857 of 4,157,543Top 25%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
9218222 Physical manager of synchronization barrier between multiple processes Angelo Solinas, Jordan Chicheportiche, Saïd Derradji, Zoltan Menyhart, Sylvain Jeaugey +1 more 2015-12-22
8432707 Card design with fully buffered memory modules and the use of a chip between two consecutive modules 2013-04-30
8018736 Card design with fully buffered memory modules and the use of a chip between two consecutive modules 2011-09-13
7692929 Interface connection device for connecting a mainboard to a memory card having two series of memory modules Lionel Coutancier, Elodie Marquina 2010-04-06
6240491 Process and system for switching between an update and invalidate mode for each cache block Jacques Abily, Jean Perraudeau 2001-05-29
5235687 Method for replacing memory modules in a data processing system, and data processing system for performing the method Pierre Bacot, Guy Magnaud 1993-08-10