Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8341492 | Quasi-cyclic LDPC (low density parity check) code construction | Ba-Zhong Shen | 2012-12-25 |
| 8341490 | Virtual limited buffer modification for rate matching | Ba-Zhong Shen, Sirikiat Ariyavisitakul | 2012-12-25 |
| 8327221 | Overlapping sub-matrix based LDPC (low density parity check) decoder | Hau Thien Tran, Kelly Brian Cameron, Ba-Zhong Shen | 2012-12-04 |
| 8234551 | Single CRC polynomial for both turbo code block CRC and transport block CRC | Ba-Zhong Shen | 2012-07-31 |
| 8229039 | Flexible rate matching | Ba-Zhong Shen, Sirikiat Ariyavisitakul, Mark Kent, Kelly Brian Cameron | 2012-07-24 |
| 8230298 | Overlapping sub-matrix based LDPC (low density parity check) decoder | Hau Thien Tran, Kelly Brian Cameron, Ba-Zhong Shen | 2012-07-24 |
| 8145986 | Multi-CSI (Cyclic Shifted Identity) sub-matrix based LDPC (Low Density Parity Check) codes | Ba-Zhong Shen | 2012-03-27 |
| 8145974 | Virtual limited buffer modification for rate matching | Ba-Zhong Shen, Sirikiat Ariyavisitakul | 2012-03-27 |
| 8145970 | Data puncturing ensuring orthogonality within communication systems | Ba-Zhong Shen | 2012-03-27 |
| 8145987 | LDPC (low density parity check) codes with corresponding parity check matrices selectively constructed with CSI (cyclic shifted identity) and null sub-matrices | Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron | 2012-03-27 |
| 8086930 | Fixed-spacing parity insertion for FEC (Forward Error Correction) codewords | Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron | 2011-12-27 |
| 8074155 | Tail-biting turbo coding to accommodate any information and/or interleaver block size | Ba-Zhong Shen | 2011-12-06 |
| 8069387 | Turbo coding having combined turbo de-padding and rate matching de-padding | Ba-Zhong Shen | 2011-11-29 |
| 8069400 | Optimal circular buffer rate matching for turbo code | Ba-Zhong Shen | 2011-11-29 |
| 8065587 | Reduced complexity ARP (almost regular permutation) interleaves providing flexible granularity and parallelism adaptable to any possible turbo code block size | Ba-Zhong Shen | 2011-11-22 |
| 8065588 | Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave | Ba-Zhong Shen | 2011-11-22 |
| 7975203 | Quadratic polynomial permutation (QPP) interleaver providing hardware savings and flexible granularity adaptable to any possible turbo code block size | Ba-Zhong Shen | 2011-07-05 |
| 7900127 | LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices | Ba-Zhong Shen, Hau Thien Tran, Kelly Brian Cameron | 2011-03-01 |
| 7882416 | General and algebraic-constructed contention-free memory mapping for parallel turbo decoding with algebraic interleave ARP (almost regular permutation) of all possible sizes | Ba-Zhong Shen | 2011-02-01 |
| 7831894 | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves | Ba-Zhong Shen | 2010-11-09 |
| 7827473 | Turbo decoder employing ARP (almost regular permutation) interleave and arbitrary number of decoding processors | Ba-Zhong Shen | 2010-11-02 |
| 7752529 | Combined LDPC (low density parity check) encoder and syndrome checker | Ba-Zhong Shen | 2010-07-06 |
| 7716564 | Register exchange network for radix-4 SOVA (Soft-Output Viterbi Algorithm) | Johnson Yen, Ba-Zhong Shen | 2010-05-11 |
| 7661055 | Partial-parallel implementation of LDPC (Low Density Parity Check) decoders | Hau Thien Tran, Ba-Zhong Shen, Kelly Brian Cameron | 2010-02-09 |
| 7644339 | Overlapping sub-matrix based LDPC (low density parity check) decoder | Hau Thien Tran, Kelly Brian Cameron, Ba-Zhong Shen | 2010-01-05 |