Issued Patents All Time
Showing 151–175 of 215 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7493354 | FIR filter tap architecture for highly dense layout | — | 2009-02-17 |
| 7466751 | System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system | Oscar E. Azazzi, David Kruse, Arthur Abnous | 2008-12-16 |
| 7453935 | Multi-pair gigabit ethernet transceiver having decision feedback equalizer | Oscar E. Agazzi, John L. Creigh, David Kruse, Arthur Abnous, Henry Samueli | 2008-11-18 |
| 7434134 | System and method for trellis decoding in a multi-pair transceiver system | Oscar E. Agazzi, David Kruse, Arthur Abnous | 2008-10-07 |
| 7369608 | Dynamic regulation of power consumption of a high-speed communication system | Oscar E. Agazzi, John L. Creigh, Henry Samueli | 2008-05-06 |
| 7336131 | Gigabit ethernet transceiver with analog front end | Arya Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan +5 more | 2008-02-26 |
| D560049 | Waste container | Mehrtosh Ghalebi | 2008-01-15 |
| D556971 | Waste container | Mehrtosh Ghalebi | 2007-12-04 |
| 7305029 | Multi-pair gigabit ethernet transceiver | Oscar E. Agazzi, John L. Creigh, David Kruse, Arthur Abnous, Henry Samueli | 2007-12-04 |
| 7263134 | Ethernet transceiver with single-state decision feedback equalizer | Oscar E. Agazzi, John L. Creigh, Henry Samueli, David Kruse, Arthur Abnous | 2007-08-28 |
| 7248629 | Efficient FIR filter for high-speed communication | — | 2007-07-24 |
| 7197069 | Multi-pair gigabit ethernet transceiver having adaptive disabling of circuit elements | Oscar E. Agazzi, John L. Creigh, David Kruse, Arthur Abnous, Henry Samueli | 2007-03-27 |
| 7194028 | Multi-Pair Gigabit Ethernet Transceiver having decision feedback equalizer | Oscar E. Agazzi, John L. Creigh, Henry Samueli, David Kruse, Arthur Abnous | 2007-03-20 |
| 7194029 | Multi-pair gigabit ethernet transceiver having adaptive disabling or circuit elements | Oscar E. Agazzi, John L. Creigh, David Kruse, Arthur Abnous, Henry Samueli | 2007-03-20 |
| 7148750 | Gigabit ethernet transceiver with analog front end | Arya Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan +5 more | 2006-12-12 |
| 7145188 | Apparatus and method of image processing to avoid image saturation | Esin Terzioglu, Ali Anvar | 2006-12-05 |
| 7129697 | Dynamic register with IDDQ testing capability | — | 2006-10-31 |
| 7082076 | Memory module with hierarchical functionality | Esin Terzioglu, Morteza Cyrus Afghahi | 2006-07-25 |
| 7053715 | Gigabit Ethernet transceiver with analog front end | Arya Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan +5 more | 2006-05-30 |
| 7038533 | Gigabit ethernet transceiver with analog front end | Arya Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan +5 more | 2006-05-02 |
| 7038545 | Gigabit ethernet transceiver with analog front end | Arya Behzad, Klaas Bult, Ramon A. Gomez, Chi-Hung Lin, Tom W. Kwan +5 more | 2006-05-02 |
| 7005892 | Circuit technique for high speed low power data transfer bus | Morteza Cyrus Afghahi, Esin Terzioglu | 2006-02-28 |
| 6959038 | High-speed decoder for a multi-pair gigabit transceiver | Oscar E. Agazzi, David Kruse, Arthur Abnous | 2005-10-25 |
| 6947482 | System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system | Oscar E. Azazzi, David Kruse, Arthur Abnous | 2005-09-20 |
| 6944237 | Multi-pair transceiver decoder system with low computation slicer | Oscar E. Agazzi, David Kruse, Arthur Abnous | 2005-09-13 |