Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7567482 | Block redundancy implementation in heirarchical ram's | Esin Terzioglu, Gil I. Winograd | 2009-07-28 |
| 7177225 | Block redundancy implementation in heirarchical RAM'S | Esin Terzioglu, Gil I. Winograd | 2007-02-13 |
| 6898145 | Distributed, highly configurable modular predecoding | Gil I. Winograd, Esin Terzioglu, Ali Anvar, Sami Issa | 2005-05-24 |
| 6888761 | Memory device having simultaneous read/write and refresh operations with coincident phases | Sami Issa | 2005-05-03 |
| 6760243 | Distributed, highly configurable modular predecoding | Gil I. Winograd, Esin Terzioglu, Ali Anvar, Sami Issa | 2004-07-06 |
| 6717863 | Transparent continuous refresh RAM cell architecture | Sami Issa | 2004-04-06 |
| 6714467 | Block redundancy implementation in heirarchical RAM's | Esin Terzioglu, Gil I. Winograd | 2004-03-30 |
| 6600677 | Memory circuit capable of simultaneous writing and refreshing on the same column and a memory cell for application in the same | Sami Issa | 2003-07-29 |
| 6573936 | Method and apparatus for providing a single-instruction multiple data digital camera system that integrates on-chip sensing and parallel processing | Tonia G. Morris, Kevin M. Connolly, Jean-Charles Korta | 2003-06-03 |
| 6574136 | Reduced leakage memory cell | Sami Issa, Zeynep Toros | 2003-06-03 |
| 6430098 | Transparent continuous refresh RAM cell architecture | Sami Issa | 2002-08-06 |