| 12475468 |
Administrative precompiles |
— |
2025-11-18 |
|
| 12380439 |
Authenticated cross-subnet communication |
Michael Edmond Kaplan, Stephen Buttolph, Daniel Laine, Alexander J. Dunn, Cameron John Schultz +2 more |
2025-08-05 |
|
| 12120246 |
Authenticated cross-subnet communication |
Michael Edmond Kaplan, Stephen Buttolph, Daniel Laine, Alexander J. Dunn, Cameron John Schultz +2 more |
2024-10-15 |
|
| 11728817 |
Clock and data recovery devices with fractional-N PLL |
Mrunmay Talegaonkar, Jorge Pernillo, Junyi Sun, Praveen Prabha, Chang-Feng Loi +4 more |
2023-08-15 |
$89,981,000 |
| 11231741 |
Systems and methods for generating clock signals |
— |
2022-01-25 |
$169,177,000 |
| 11218156 |
Clock and data recovery devices with fractional-N PLL |
Mrunmay Talegaonkar, Jorge Pernillo, Junyi Sun, Praveen Prabha, Chang-Feng Loi +4 more |
2022-01-04 |
$133,244,000 |
| 10804913 |
Clock and data recovery devices with fractional-N PLL |
Mrunmay Talegaonkar, Jorge Pernillo, Junyi Sun, Praveen Prabha, Chang-Feng Loi +4 more |
2020-10-13 |
$31,747,000 |
| 9866230 |
Method and apparatus for calibration of a time interleaved ADC |
Josephus Van Engelen, Ralph Duncan |
2018-01-09 |
|
| 9537502 |
Method and apparatus for calibration of a time interleaved ADC |
Josephus Van Engelen, Ralph Duncan |
2017-01-03 |
|
| 9143149 |
Method and apparatus for calibration of a time interleaved ADC |
Josephus Van Engelen, Ralph Duncan |
2015-09-22 |
|
| 8824538 |
Methods and systems for adaptive receiver equalization |
Xicheng Jiang, Hui Wang, Howard Baumer, Avanindra Madisetti |
2014-09-02 |
$3,669,000 |
| 8798219 |
High-speed serial data transceiver and related methods |
Michael Le, Josephus Van Engelen, Xicheng Jiang, Hui Wang, Howard Baumer +1 more |
2014-08-05 |
$3,657,000 |
| 8472512 |
Methods and systems for adaptive receiver equalization |
Xicheng Jiang, Hui Wang, Howard Baumer, Avanindra Madisetti |
2013-06-25 |
$3,284,000 |
| 8433020 |
High-speed serial data transceiver and related methods |
Michael Le, Josephus Van Engelen, Xicheng Jiang, Hui Wang, Howard Baumer +1 more |
2013-04-30 |
$5,746,000 |
| 8351560 |
Phase interpolator based transmission clock control |
Michael Le, Hui Wang, Howard Baumer, Pieter Vorenkamp |
2013-01-08 |
$6,332,000 |
| 8223828 |
Methods and systems for adaptive receiver equalization |
Xicheng Jiang, Hui Wang, Howard Baumer, Avanindra Madisetti |
2012-07-17 |
$6,408,000 |
| 8050373 |
Phase interpolator based transmission clock control |
Michael Le, Hui Wang, Howard Baumer, Pieter Vorenkamp |
2011-11-01 |
$7,086,000 |
| 7808408 |
Minimizing adverse effects of skew between two analog-to-digital converters |
Avanindra Madisetti, Thomas D. Kwon |
2010-10-05 |
|
| 7800521 |
Nonlinear compensation in analog to digital converters |
Avanindra Madisetti, Thomas D. Kwon |
2010-09-21 |
|
| 7586987 |
High speed data link with transmitter equalization and receiver equalization |
Pieter Vorenkamp |
2009-09-08 |
$5,811,000 |
| 7450050 |
Switched-capacitor reset architecture for opamp |
Afshin Rezayee, Ken Martin |
2008-11-11 |
|
| 7286597 |
Methods and systems for adaptive receiver equalization |
Xicheng Jiang, Hui Wang, Howard Baumer, Avanindra Madisetti |
2007-10-23 |
$12,380,000 |
| 7071857 |
Analog to digital converter |
Klaas Bult |
2006-07-04 |
|
| 7058150 |
High-speed serial data transceiver and related methods |
Michael Le, Jurgen Van Engelen, Xicheng Jiang, Hui Wang, Howard Baumer +1 more |
2006-06-06 |
$13,696,000 |
| 7016449 |
Timing recovery and frequency tracking system and method |
Myles Wakayama, Michael Le, Jurgen Van Engelen, Xicheng Jiang, Hui Wang +2 more |
2006-03-21 |
$14,191,000 |
