Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7505294 | Tri-level inverter | Sayeed Ahmed, Fred Flett, Ajay V. Patwardhan | 2009-03-17 |
| 7443692 | Power converter architecture employing at least one capacitor across a DC bus | Ajay V. Patwardhan, Sayeed Ahmed, Fred Flett | 2008-10-28 |
| 7301755 | Architecture for power modules such as power inverters | Pablo Rodriguez, Ajay V. Patwardhan, Kanghua Chen, Sayeed Ahmed, Gerardo Jimenez +1 more | 2007-11-27 |
| 7292451 | Architecture for power modules such as power inverters | Pablo Rodriguez, Ajay V. Patwardhan, Kanghua Chen, Sayeed Ahmed, Gerardo Jimenez +1 more | 2007-11-06 |
| 7289343 | Architecture for power modules such as power inverters | Pablo Rodriguez, Ajay V. Patwardhan, Kanghua Chen, Sayeed Ahmed, Gerardo Jimenez +1 more | 2007-10-30 |
| 7180763 | Power converter | Ajay V. Patwardhan, Fred Flett, Sayeed Ahmed, Pablo Rodriguez, Kanghua Chen +1 more | 2007-02-20 |
| 7046535 | Architecture for power modules such as power inverters | Pablo Rodriguez, Ajay V. Patwardhan, Kanghua Chen, Sayeed Ahmed, Gerardo Jimenez +1 more | 2006-05-16 |
| 6987670 | Dual power module power system architecture | Sayeed Ahmed, Fred Flett, Ajay V. Patwardhan | 2006-01-17 |
| 6906404 | Power module with voltage overshoot limiting | Sayeed Ahmed, Ajay V. Patwardhan, Fred Flett | 2005-06-14 |
| 6861835 | Method and system for non-invasive power transistor die voltage measurement | Orrin B. West, Chingchi Chen | 2005-03-01 |
| 6845017 | Substrate-level DC bus design to reduce module inductance | Sayeed Ahmed, Scott Parkhill, Fred Flett | 2005-01-18 |
| 6636429 | EMI reduction in power modules through the use of integrated capacitors on the substrate level | Sayeed Ahmed, Scott Parkhill, Fred Flett | 2003-10-21 |
| 6330143 | Automatic over-current protection of transistors | Chingchi Chen | 2001-12-11 |