Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7712061 | Method, system, and computer program product for generating and verifying isolation logic modules in design of integrated circuits | Bhanu Kapoor, Sanjay Churiwala | 2010-05-04 |
| 7694252 | Method and system for static verification of multi-voltage circuit design | Saptarshi Biswas, Srikanth Jadcherla, Sriram Kotni | 2010-04-06 |
| 7546559 | Method of optimization of clock gating in integrated circuit designs | Bhanu Kapoor, Nitin Sharma | 2009-06-09 |
| 7349835 | Method, system and computer program product for generating and verifying isolation logic modules in design of integrated circuits | Bhanu Kapoor, Sanjay Churiwala | 2008-03-25 |
| 7152216 | Method, system, and computer program product for automatic insertion and correctness verification of level shifters in integrated circuits with multiple voltage domains | Bhanu Kapoor | 2006-12-19 |