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USPTO Patent Rankings Data through Dec 31, 2025
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Danut Manea — 20 Patents

ATAtmel: 15 patents #42 of 762Top 6%
HLHefei Reliance Memory Limited: 3 patents #19 of 28Top 70%
Saratoga, CA: #491 of 2,933 inventorsTop 20%
California: #29,208 of 386,348 inventorsTop 8%
Overall (All Time): #214,803 of 4,157,543Top 6%
20 Patents All Time
Danut Manea has been granted 20 US patents while listed as an inventor at Atmel. The first was granted in 2003 and the most recent in April 2024. Danut Manea ranks #214,803 of 4,157,543 US inventors in our database (top 5.2%). Patent records list Danut Manea in Saratoga, CA, US.

Issued Patents All Time

Showing 1–20 of 20 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11967374 Voltage-mode bit line precharge for random-access memory cells 2024-04-23
11482281 Voltage-mode bit line precharge for random-access memory cells 2022-10-25
11024373 Voltage-mode bit line precharge for random-access memory cells 2021-06-01
10200017 Self-setting/resetting latch Jeffrey P. Kotowski 2019-02-05
9882738 Single-wire communications using iterative baud learning Jeffrey P. Kotowski 2018-01-30
9501078 Voltage reference with low sensitivty to package shift Jeff Kotowski, Scott N. Fritz, Yongliang Wang 2016-11-22
9490999 Single-wire communications using iterative baud learning Jeffrey P. Kotowski 2016-11-08
9483108 Ultra-deep power-down mode for memory devices Richard V. De Caro, Yongliang Wang, Stephen Trinh, Paul Hill 2016-11-01
9037890 Ultra-deep power-down mode for memory devices Richard V. De Caro, Yongliang Wang, Stephen Trinh, Paul Hill 2015-05-19
9013231 Voltage reference with low sensitivity to package shift Jeff Kotowski, Scott N. Fritz, Yongliang Wang 2015-04-21 $3,774,000
8885413 Adaptive programming for non-volatile memory devices Erwin Castillon, Uday Mudumba, Sabina Centazzo, Stephen Trinh, Dixie Nguyen 2014-11-11 $10,347,000
8208315 Method and system to access memory Richard V. De Caro 2012-06-26 $13,366,000
7929356 Method and system to access memory Richard V. De Caro 2011-04-19 $34,432,000
7242242 Fast dynamic low-voltage current mirror with compensated error Lorenzo Bedarida, Mirella Marsella, Andrea Sacco 2007-07-10 $8,845,000
7236050 Fast dynamic low-voltage current mirror with compensated error Lorenzo Bedarida, Mirella Marsella, Andrea Sacco 2007-06-26 $9,024,000
7084699 Fast dynamic low-voltage current mirror with compensated error Lorenzo Bedarida, Mirella Marsella, Andrea Sacco 2006-08-01 $13,934,000
6724662 Method of recovering overerased bits in a memory device 2004-04-20 $24,760,000
6714448 Method of programming a multi-level memory device 2004-03-30 $49,102,000
6621745 Row decoder circuit for use in programming a memory device 2003-09-16 $61,303,000
6618297 Method of establishing reference levels for sensing multilevel memory cell states 2003-09-09 $33,126,000