Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8522178 | Re-modeling a memory array for accurate timing analysis | Raghuraman Ganesan | 2013-08-27 |
| 8397199 | Versatile method and tool for simulation of aged transistors | Apurva H. Soni, Antonietta Oliva, Edgardo F. Klass, James E. Burnette, II | 2013-03-12 |
| 7000206 | Timing path detailer | David A. Kidd | 2006-02-14 |
| 6940293 | Modeling miller effect in static timing analysis | Kumarswamy Ramarao | 2005-09-06 |
| 6877147 | Technique to assess timing delay by use of layout quality analyzer comparison | David A. Kidd, Nathan DIAS | 2005-04-05 |
| 6834379 | Timing path detailer | David A. Kidd | 2004-12-21 |
| 6791343 | Modeling miller effect in static timing analysis | Kumarswamy Ramarao | 2004-09-14 |