Issued Patents All Time
Showing 51–63 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7793059 | Interleaving policies for flash memory | Michael J. Cornwell | 2010-09-07 |
| 7773022 | Operating NAND cells using multiple levels for each data value | Michael J. Cornwell | 2010-08-10 |
| 7752391 | Variable caching policy system and method | Michael J. Cornwell, Kenneth Louis Herman | 2010-07-06 |
| 7702935 | Reporting flash memory operating voltages | Michael J. Cornwell, Joseph Fisher | 2010-04-20 |
| 7701797 | Two levels of voltage regulation supplied for logic and data programming voltage of a memory device | Michael J. Cornwell | 2010-04-20 |
| 7639542 | Maintenance operations for multi-level data storage cells | Michael J. Cornwell | 2009-12-29 |
| 7639531 | Dynamic cell bit resolution | Michael J. Cornwell | 2009-12-29 |
| 7613043 | Shifting reference values to account for voltage sag | Michael J. Cornwell | 2009-11-03 |
| 7609561 | Disabling faulty flash memory dies | Michael J. Cornwell | 2009-10-27 |
| 7594043 | Reducing dismount time for mass storage class devices | Michael J. Cornwell | 2009-09-22 |
| 7568135 | Use of alternative value in cell detection | Michael J. Cornwell | 2009-07-28 |
| 7551486 | Iterative memory cell charging based on reference cell value | Michael J. Cornwell | 2009-06-23 |
| 7511646 | Use of 8-bit or higher A/D for NAND cell value | Michael J. Cornwell | 2009-03-31 |