Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5737572 | Bank selection logic for memory controllers | — | 1998-04-07 |
| 5619471 | Memory controller for both interleaved and non-interleaved memory | — | 1997-04-08 |
| 5572686 | Bus arbitration scheme with priority switching and timer | Riaz A. Moledina, Chi-Shing Ng | 1996-11-05 |