Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399203 | Bridge-based impedance sensor system | Isaac Chase Novet | 2025-08-26 |
| 11994546 | Bridge-based impedance sensor system | Isaac Chase Novet | 2024-05-28 |
| RE48996 | Circuit architecture for mode switch | Shrenik Deliwala, Gregory T. Koker, Dan M. Weinberg | 2022-03-29 |
| 10056868 | Four-stage circuit architecture for detecting pulsed signals | Shrenik Deliwala, Dan M. Weinberg | 2018-08-21 |
| 9733275 | Circuit architecture for mode switch | Shrenik Deliwala, Gregory T. Koker, Dan M. Weinberg | 2017-08-15 |
| 9130070 | Four-stage circuit architecture for detecting pulsed signals | Shrenik Deliwala, Dan M. Weinberg | 2015-09-08 |
| 8749656 | Apparatus and method for image decimation for image sensors | Edward Chapin Guthrie, Masatoshi Sase, Katsu Nakamura | 2014-06-10 |
| 8654226 | Clock gated power saving shift register | — | 2014-02-18 |
| 7692489 | Differential two-stage miller compensated amplifier system with capacitive level shifting | Daniel F. Kelly, Lawrence A. Singer, Stephen R. Kosic | 2010-04-06 |
| 7437590 | Spread-spectrum clocking | Jianrong Chen, David P. Foley, Mark Sayuk | 2008-10-14 |
| 7242428 | Image sensor using multiple array readout lines | Stuart Boyd, Laurier St. Onge | 2007-07-10 |
| 7123301 | Pixel gain amplifier | Katsu Nakamura | 2006-10-17 |
| 6965332 | Methods and apparatus for digital offset correction using an ADC with an increased input range | Katsufumi Nakamura | 2005-11-15 |
| 6864820 | Analog-to-digital conversion using an increased input range | Katsufumi Nakamura | 2005-03-08 |
| 6577183 | Offset correction circuit | Katsufumi Nakamura | 2003-06-10 |
| 6570615 | Pixel readout scheme for image sensors | Stuart Boyd, Laurier St. Onge | 2003-05-27 |
| 6512546 | Image sensor using multiple array readout lines | Stuart Boyd, Laurier St. Onge | 2003-01-28 |
| 6433632 | Correlated double sampling circuit with op amp | Katsufumi Nakamura | 2002-08-13 |