Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6480086 | Inductor and transformer formed with multi-layer coil turns fabricated on an integrated circuit substrate | Wolfram Kluge, Dietmar Eggert | 2002-11-12 |
| 6218931 | Home-appliance network with nodes identified by direct-sequence spreading codes | David F. Tobias | 2001-04-17 |
| 6115762 | PC wireless communications utilizing an embedded antenna comprising a plurality of radiating and receiving elements responsive to steering circuitry to form a direct antenna beam | Russell W. Bell, Yan Zhou | 2000-09-05 |
| 6108390 | Method of and apparatus for encoding of output symbol size | Russell W. Bell | 2000-08-22 |
| 6085314 | Central processing unit including APX and DSP cores and including selectable APX and DSP execution modes | Andrew Mills | 2000-07-04 |
| 6032247 | Central processing unit including APX and DSP cores which receives and processes APX and DSP instructions | Andrew Mills | 2000-02-29 |
| 6026130 | System and method for estimating a set of parameters for a transmission channel in a communication system | Muhammad Mohsin Rahmatullah, Philip Yip | 2000-02-15 |
| 6021133 | Communication processing method using a buffer array as a virtually circular buffer | — | 2000-02-01 |
| 6014719 | Modulated bus computer system having filters with different frequency coverages for devices on the bus | Yan Zhou | 2000-01-11 |
| 6008856 | Method of using an audio transmission signal to transmit video data | — | 1999-12-28 |
| 5991725 | System and method for enhanced speech quality in voice storage and retrieval systems | Mark A. Ireton | 1999-11-23 |
| 5943493 | Retargetable VLIW computer architecture and method of executing a program corresponding to the architecture | Paul R. Teich, Sherman Lee | 1999-08-24 |
| 5794068 | CPU with DSP having function preprocessor that converts instruction sequences intended to perform DSP function into DSP function identifier | Mark A. Ireton, John G. Bartkowiak | 1998-08-11 |
| 5790824 | Central processing unit including a DSP function preprocessor which scans instruction sequences for DSP functions | Mark A. Ireton, John G. Bartkowiak | 1998-08-04 |
| 5790817 | Configurable digital wireless and wired communications system architecture for implementing baseband functionality | Michael E. Spak | 1998-08-04 |
| 5784640 | CPU with DSP function preprocessor having look-up table for translating instruction sequences intended to perform DSP function into DSP macros | Mark A. Ireton, John G. Bartkowiak | 1998-07-21 |
| 5781792 | CPU with DSP having decoder that detects and converts instruction sequences intended to perform DSP function into DSP function identifier | Mark A. Ireton, John G. Bartkowiak | 1998-07-14 |
| 5771394 | Apparatus having signal processors for providing respective signals to master processor to notify that newly written data can be obtained from one or more memories | Brett B. Stewart | 1998-06-23 |
| 5771393 | Servo loop control apparatus having master processor to control the apparatus and second processor dedicated to specific preprogrammed servo loop control tasks | Brett B. Stewart | 1998-06-23 |
| 5754878 | CPU with DSP function preprocessor having pattern recognition detector that uses table for translating instruction sequences intended to perform DSP function into DSP macros | Mark A. Ireton, John G. Bartkowiak | 1998-05-19 |
| 5630165 | Servo system controlled by master and second processors through memory being accessed for read and write by processors in separate portions respectively | Brett B. Stewart | 1997-05-13 |
| 4839842 | Digital tone detection and generation | Hwa-Sheng Pyi | 1989-06-13 |