Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6578080 | Mechanism for run time programming of hardware resources with least interference with continued operation | — | 2003-06-10 |
| 6550033 | Method and apparatus for exercising external memory with a memory built-in test | — | 2003-04-15 |
| 6526370 | Mechanism for accumulating data to determine average values of performance parameters | Ching Yu, Jerry Chun-Jen Kuo, John M. Chiang | 2003-02-25 |
| 6463542 | Power management indication mechanism for supporting power saving mode in computer system | Ching Yu, Jerry Chun-Jen Kuo, Din-I Tsai | 2002-10-08 |
| 6389557 | Freezing mechanism for debugging | Ching Yu, Din-I Tsai, Jerry Chun-Jen Kuo | 2002-05-14 |
| 6311284 | Using an independent clock to coordinate access to registers by a peripheral device and a host system | — | 2001-10-30 |
| 6229817 | System and method for programming late collision slot time | Jenny Liu Fischer, Ching Yu | 2001-05-08 |
| 6094443 | Apparatus and method for detecting a prescribed pattern in a data stream by selectively skipping groups of nonrelevant data bytes | — | 2000-07-25 |
| 6070248 | Generation of a stable reference clock frequency from a base clock frequency that may vary depending on source | Ching Yu | 2000-05-30 |
| 6067408 | Full duplex buffer management and apparatus | Thomas J. Runaldue | 2000-05-23 |
| 5948079 | System for non-sequential transfer of data packet portions with respective portion descriptions from a computer network peripheral device to host memory | Din-I Tsai | 1999-09-07 |
| 5938728 | Apparatus and method for selectively controlling clocking and resetting of a network interface | Ching Yu, Robert Alan Williams, Rajat Roy | 1999-08-17 |
| 5938771 | Apparatus and method in a network interface for enabling power up of a host computer using magic packet and on-now power up management schemes | Robert Alan Williams | 1999-08-17 |
| 5933413 | Adaptive priority determination for servicing transmit and receive in network controllers | Shashank Merchant | 1999-08-03 |
| 5878028 | Data structure to support multiple transmit packets for high performance | Rajat Roy, Jenny Liu Fischer | 1999-03-02 |
| 5533203 | Start of packet receive interrupt for ethernet controller | Matthew James Fischer, Glen Gibson, Thomas J. Runaldue | 1996-07-02 |