| 9075930 |
Configurable embedded memory system |
Subodh Kumar, James M. Simkins, Thomas H. Strader, Matthew H. Klein, Uma Durairajan |
2015-07-07 |
| 8912829 |
Method and apparatus for using a synchronous reset pulse to reset circuitry in multiple clock domains |
James M. Simkins, Uma Durairajan, Subodh Kumar |
2014-12-16 |
| 7590965 |
Methods of generating a design architecture tailored to specified requirements of a PLD design |
Michael Ingoldby, Jeffrey C. Ward, Stacey Secatch, Restu I. Ismail, Thomas E. Fischaber |
2009-09-15 |
| 7574688 |
Using high-level language functions in HDL synthesis tools |
Jeffrey C. Ward, Mark R. McLaughlin, Jerome Bertrand, Michael Ingoldby |
2009-08-11 |
| 7539789 |
Circuits providing greater depth and/or asymmetric access ports for first-in first-out memory circuits (FIFOs) |
— |
2009-05-26 |
| 7506298 |
Methods of mapping a logical memory representation to physical memory in a programmable logic device |
Michael Ingoldby, Stacey Secatch |
2009-03-17 |
| 7433980 |
Memory of and circuit for rearranging the order of data in a memory having asymmetric input and output ports |
Scott J. Fischaber |
2008-10-07 |
| 7057546 |
Binary priority encoder |
Stacey Secatch |
2006-06-06 |
| 5533103 |
Calling system and method |
Stephen D. Peavey, William J. Hoyt, Ino Dunn, Paul Zmuda, David A. Jamroga +1 more |
1996-07-02 |