Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4556759 | Padless plated vias having soldered wicks for multi-layer printed circuit boards | — | 1985-12-03 |
| 4543715 | Method of forming vertical traces on printed circuit board | Warren F. Strassle, Gene W. Russo | 1985-10-01 |