Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6693346 | Semiconductor memory module having double-sided stacked memory chip layout | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 2004-02-17 |
| 6617193 | Semiconductor device, semiconductor device substrate, and methods of fabricating the same | Yamazaki Toshio, Fukutomi Naoki, Suzuki Kazuhisa, Morita Hiroshi, Naoyuki Susumu +1 more | 2003-09-09 |
| 6521993 | Semiconductor memory module having double-sided stacked memory chip layout | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 2003-02-18 |
| 6424030 | Semiconductor memory module having double-sided stacked memory chip layout | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 2002-07-23 |
| 6262488 | Semiconductor memory module having double-sided memory chip layout | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 2001-07-17 |
| 5708298 | Semiconductor memory module having double-sided stacked memory chip layout | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 1998-01-13 |
| 5587341 | Process for manufacturing a stacked integrated circuit package | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 1996-12-24 |
| 5138438 | Lead connections means for stacked tab packaged IC chips | Watanabe Masayuki, Sugano Toshio, Tsukui Seiichiro, Ono Takashi | 1992-08-11 |