Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8938628 | Staggered power-up and synchronized reset for a large ASIC or FPGA | Lawrence S. Pellach, Bhupen Shah | 2015-01-20 |
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8938628 | Staggered power-up and synchronized reset for a large ASIC or FPGA | Lawrence S. Pellach, Bhupen Shah | 2015-01-20 |