Issued Patents 2025
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12299449 | Performance and power efficient processor when switching between fetching from decoded and non-decoded instruction sources | John G. Favor | 2025-05-13 |
| 12282430 | Macro-op cache data entry pointers distributed as initial pointers held in tag array and next pointers held in data array for efficient and performant variable length macro-op cache entries | John G. Favor | 2025-04-22 |
| 12253951 | Microprocessor with branch target buffer whose entries include fetch block hotness counters used for selective filtering of macro-op cache allocations | John G. Favor | 2025-03-18 |