Partial year: Data through Q3 2025 (Sept 30). Full-year totals not yet available.
JS

Jaspal Singh Shah

TSMC: 4 patents #764 of 3,957Top 20%
📍 Ottawa, CA: #29 of 523 inventorsTop 6%
Overall (2025): #35,339 of 469,880Top 8%
4
Patents 2025

Issued Patents 2025

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
12400689 Circuits and methods of mitigating hold time failure of pipeline for memory device 2025-08-26
12379740 Technique to mitigate clock generation failure at high input clock slew Atul Katoch 2025-08-05
12272427 Semiconductor device including first and second clock generators Sahil Preet Singh, Atul Katoch 2025-04-08
12243602 Method, device, and circuit for high-speed memories Atul Katoch 2025-03-04