Issued Patents 2025
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417287 | RISC-V and O-CFI mechanism-based defense method and apparatus for code reuse attacks | Yanjun Wu, Chen Zhao, Jingzheng Wu, Zhiqing Rui, Bin Wu +1 more | 2025-09-16 |
| 12414331 | Isolation for multigate devices | Ko-Cheng Liu, Ming-Lung Cheng | 2025-09-09 |
| 12414330 | Multi-gate device including semiconductor fin between dielectric fins and method of fabrication thereof | Ko-Cheng Liu, Huiling Shang | 2025-09-09 |
| 12389653 | Semiconductor devices and methods of fabricating the same | Chun-Fai Cheng, Ming-Lung Cheng | 2025-08-12 |
| 12363935 | Methods for forming multi-gate transistors | Wei-Lun Min | 2025-07-15 |
| 12356703 | Air spacer formation for semiconductor devices | Wei-Lun Min | 2025-07-08 |
| 12349432 | Enlarged backside contact | Bwo-Ning Chen, Xusheng Wu, Yin-Pin Wang, Yuh-Sheng Jean | 2025-07-01 |
| 12349384 | Isolation structures in multi-gate semiconductor devices and methods of fabricating the same | Xusheng Wu, Huiling Shang | 2025-07-01 |
| 12324218 | Semiconductor devices with air gaps and the method thereof | Ko-Cheng Liu, Ming-Lung Cheng | 2025-06-03 |
| 12317550 | Methods of forming a semiconductor device with corner isolation protection | Bwo-Ning Chen, Xusheng Wu, Pin-Ju Liang, Shih-Hao Lin | 2025-05-27 |
| 12278276 | Multi-channel devices and method with anti-punch through process | Ko-Cheng Liu, Ming-Lung Cheng | 2025-04-15 |
| 12230720 | Semiconductor structure with recessed top semiconductor layer in substrate and method of fabricating the same | Wei-Lun Min, Ko-Cheng Liu | 2025-02-18 |
| 12218013 | Gate structures for semiconductor devices | Chun-Fai Cheng, Kuan-Chung Chen | 2025-02-04 |