Issued Patents 2025
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424295 | Evolving bad block detection in non-volatile memory | Parth Amin, Xiang Yang | 2025-09-23 |
| 12394483 | Memory die management | Xiang Yang | 2025-08-19 |
| 12387800 | Multi-stage programming techniques with three states per memory cell parity | Xiang Yang | 2025-08-12 |
| 12379990 | Single block mode block handling for single-side GIDL erase | Xiang Yang | 2025-08-05 |
| 12354682 | Intermediate re-verify for achieving tighter threshold voltage distributions in a memory device | Xiang Yang | 2025-07-08 |
| 12327046 | Data retention-specific refresh read | Muhammad Masuduzzaman, Deepanshu Dutta | 2025-06-10 |
| 12230333 | Bit line modulation to compensate for cell source variation | Anirudh Amarnath, Aravind Suresh | 2025-02-18 |