Issued Patents 2025
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12429902 | Memory system, memory access interface device and operation method thereof | Fu-Chin Tsai, Ger-Chih Chou, Chih-Wei Chang, Min-Han Tsai | 2025-09-30 |
| 12417795 | Physical layer circuit, write leveling training circuit and method for calibrating access control signal transmitted to memory device | Fu-Chin Tsai, Chih-Wei Chang, Gerchih Chou | 2025-09-16 |
| 12300330 | Memory system and memory access interface device thereof for supporting different speed modes | Fu-Chin Tsai, Ger-Chih Chou, Chih-Wei Chang | 2025-05-13 |
| 12288583 | Memory controller and method for calibrating data reception window | Shih-Chang Chen, Chih-Wei Chang | 2025-04-29 |
| 12211699 | Method of removing step height on gate structure | Yeh-Sheng Lin, Chang-Mao Wang, Chung-Yi Chiu | 2025-01-28 |
| 12188982 | Test method for delay circuit and test circuitry | Kuo-Wei Chi, Chih-Wei Chang | 2025-01-07 |