Issued Patents 2025
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12388423 | Data receiver circuit including loop-unrolled phase decision feedback equalizer with duty cycle control | Seokkyun Ko, Jeffrey Mark Hinrichs | 2025-08-12 |
| 12348227 | Double data rate output circuit with reconfigurable equalizer | Jaseem AHAMMED | 2025-07-01 |
| 12211578 | DDR PHY power collapse circuit for multimode double data rate synchronous dynamic random access memory | Levon Msryan, Tigran Melikyan, Satish Krishnamoorthy | 2025-01-28 |