Issued Patents 2025
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12419200 | Memory cell formation in three dimensional memory arrays using atomic layer deposition | Stephen W. Russell, Enrico Varesi, Lorenzo Fratin | 2025-09-16 |
| 12412626 | Accessing memory cells in a vertical memory array | Corrado Villa, Stefan Frederik Schippers, Lorenzo Fratin | 2025-09-09 |
| 12408332 | Memory devices having one-time-programmable fuses and/or antifuses formed from thin-film transistors | Lorenzo Fratin, Fabio Pellizzer | 2025-09-02 |
| 12396180 | Pillar and word line plate architecture for a memory array | Lorenzo Fratin, Enrico Varesi, Thomas M. Graettinger | 2025-08-19 |
| 12354707 | Word line structures for three-dimensional memory arrays | Stephen W. Russell, Lorenzo Fratin, Enrico Varesi | 2025-07-08 |
| 12302766 | Sparse piers for three-dimensional memory arrays | Stephen W. Russell, Enrico Varesi, David H. Wells, Lorenzo Fratin | 2025-05-13 |
| 12245438 | Dense piers for three-dimensional memory arrays | Stephen W. Russell, Enrico Varesi, David H. Wells, Lorenzo Fratin | 2025-03-04 |
| 12236999 | Decoder architectures for three-dimensional memory devices | Lorenzo Fratin, Fabio Pellizzer | 2025-02-25 |
| 12232432 | Memory cells with sidewall and bulk regions in vertical structures | Lorenzo Fratin, Enrico Varesi | 2025-02-18 |
| 12219784 | Memory device and method for manufacturing the same | Lorenzo Fratin, Fabio Pellizzer | 2025-02-04 |