Issued Patents 2025
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430205 | Methods for error count reporting with scaled error count information, and memory devices employing the same | Randall J. Rooney | 2025-09-30 |
| 12393355 | Combined memory module logic devices for reduced cost and improved functionality | — | 2025-08-19 |
| 12367161 | Individually addressing memory devices disconnected from a data bus | Scott E. Schaefer | 2025-07-22 |
| 12315547 | Refresh operation in multi-die memory | Thomas H. Kinsley | 2025-05-27 |
| 12307134 | Apparatuses and methods for configuring I/Os of memory for hybrid memory modules | — | 2025-05-20 |
| 12300349 | Memory module multiple port buffer techniques | Jasper S. Gibbons, Brent Keeth, Frank F. Ross, Daniel B. Stewart, Randall J. Rooney | 2025-05-13 |
| 12260926 | Loopback datapath for clock quality detection | Won Ho Choi | 2025-03-25 |
| 12229449 | Background operations in memory | Frank F. Ross | 2025-02-18 |
| 12197766 | Error injection methods using soft post-package repair (sPPR) techniques and memory devices and memory systems employing the same | Randall J. Rooney, Neal J. Koyle | 2025-01-14 |