Issued Patents 2025
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12380052 | Memory devices and systems with parallel impedance adjustment circuitry and methods for operating the same | — | 2025-08-05 |
| 12366975 | Automated error correction with memory refresh | Kang-Yong Kim | 2025-07-22 |
| 12334141 | Write timing compensation | Kang-Yong Kim, Keun Soo Song | 2025-06-17 |
| 12321288 | Asymmetric read-write sequence for interconnected dies | Kang-Yong Kim, Jason McBride Brown, Venkatraghavan Bringivijayaraghavan, Vijayakrishna J. Vankayala | 2025-06-03 |
| 12300300 | Bank-level self-refresh | John Christopher Sancon, Yang Lu, Kang-Yong Kim, Mark Kalei Hadrick | 2025-05-13 |
| 12235783 | Bus training with interconnected dice | Francesco Douglas Verna-Ketel, Smruti Subhash Jhaveri, John Christopher Sancon, Yang Lu, Kang-Yong Kim | 2025-02-25 |
| 12235784 | Bus training with interconnected dice | Yang Lu, Creston M. Dupree, Smruti Subhash Jhaveri, John Christopher Sancon, Kang-Yong Kim +1 more | 2025-02-25 |
| 12223995 | Adaptive memory registers | John Christopher Sancon, Kang-Yong Kim, Yang Lu | 2025-02-11 |