Issued Patents 2025
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332305 | Circuit and method to measure simulation to silicon timing correlation | Ashish Nayak, Hugh Mair, Anand Rajagopalan | 2025-06-17 |
| 12320850 | Dynamic voltage frequency scaling to reduce test time | Hsin-Chen Chen | 2025-06-03 |
| 12216159 | Circuit and method to measure simulation to silicon timing correlation | Ashish Nayak, Hugh Mair, Anand Rajagopalan | 2025-02-04 |