Issued Patents 2025
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12328880 | Hierarchical memory architecture including on-chip multi-bank non-volatile memory with low leakage and low latency | Navneet Jain, Bipul C. Paul | 2025-06-10 |
| 12293086 | Apparatus and method for providing high throughput memory responses | Bipul C. Paul | 2025-05-06 |