Partial year: Data through Q3 2025 (Sept 30). Full-year totals not yet available.
YF

Yoshiaki Fukuzumi

Kioxia: 7 patents #6 of 701Top 1%
Micron: 2 patents #320 of 1,205Top 30%
LG Lodestar Licensing Group: 1 patents #12 of 56Top 25%
📍 Yokkaichi, CA: #1 of 11 inventorsTop 10%
Overall (2025): #5,474 of 469,880Top 2%
10
Patents 2025

Issued Patents 2025

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
12419055 Semiconductor memory device having a circuit chip bonded to a memory array chip and including a solid-state drive controller and a control circuit Hideaki Aochi, Mie Matsuo, Kenichiro Yoshii, Koichiro Shindo, Kazushige Kawasaki +1 more 2025-09-16
12414299 Nonvolatile semiconductor memory device and manufacturing method thereof Masaru Kito, Hideaki Aochi, Ryota Katsumata, Akihiro Nitayama, Masaru Kidoh +3 more 2025-09-09
12400686 Microelectronic devices, and related memory devices and electronic systems Shuji Tanaka, Yoshihiko Kamata, Jun Fujiki, Tomoharu Tanaka 2025-08-26
12356622 Nonvolatile semiconductor memory device and method for manufacturing same Ryota Katsumata, Masaru Kito, Masaru Kidoh, Hiroyasu Tanaka, Yosuke Komori +7 more 2025-07-08
12349357 Non-volatile memory device Takashi Ishida, Takayuki Okada, Masaki Tsuji 2025-07-01
12324154 Microelectronic devices including pillars with partially-circular upper portions and circular lower portions, and related methods Matthew J. King, David Daycock, Albert Fayrushin, Richard J. Hill, Chandra S. Tiwari +1 more 2025-06-03
12317500 Semiconductor memory device having a contact plug electrically connected to an interconnection through a narrower via Hideaki Aochi 2025-05-27
RE50330 Nonvolatile semiconductor memory device and method for driving same Ryota Katsumata, Hideaki Aochi, Hiroyasu Tanaka, Masaru Kito, Masaru Kidoh +7 more 2025-03-04
12237259 Electronic devices comprising multilevel bitlines, and related methods and systems Harsh Narendrakumar Jain, Naveen Kaushik, Adam L. Olson, Richard J. Hill, Lars Heineck 2025-02-25
12219766 Non-volatile memory device including a contour of an insulation film, located below a vertically oriented embedded body, having expanded portion corresponding to the second semicondutor portion of the lower structure Masaki Tsuji 2025-02-04