Issued Patents 2025
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424299 | Digital verify failbit count (VFC) circuit | Xiaojiang Guo, Masao Kuriyama | 2025-09-23 |
| 12367936 | Page buffer circuit with bit line select transistor | Yan Wang, Jing Wei, Yang Zhang, Kuriyama Masao | 2025-07-22 |
| 12334162 | Digital Verify Failbit Count (VFC) circuit | Masao Kuriyama | 2025-06-17 |
| 12322456 | Digital verify failbit count (VFC) circuit | Masao Kuriyama | 2025-06-03 |
| 12322465 | Digital verify failbit count (VFC) circuit | Masao Kuriyama | 2025-06-03 |
| 12277993 | Page buffer circuits in three-dimensional memory devices | Yan Wang, Masao Kuriyama | 2025-04-15 |