Issued Patents 2025
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12430135 | Device, method, and system to facilitate improved bandwidth of a branch prediction unit | Sumeet Bandishte, Jayesh Gaur, Franck Sala, Alexey Y. Sivtsov, Jared W. Stark, IV +1 more | 2025-09-30 |
| 12417182 | De-prioritizing speculative code lines in on-chip caches | Anant Vithal Nori, Prathmesh Kallurkar, Niranjan Soundararajan, Lihu Rappoport, Hanna Alam +2 more | 2025-09-16 |
| 12405890 | Method and apparatus for leveraging simultaneous multithreading for bulk compute operations | Anant Vithal Nori, Rahul Bera, Shankar Balachandran, Joydeep Rakshit, Om Ji Omer +2 more | 2025-09-02 |
| 12373676 | Techniques for accelerating neural networks | Gurpreet Singh Kalsi, Ramachandra Chakenalli Nanjegowda, Kamlesh Pillai | 2025-07-29 |
| 12360768 | Throttling code fetch for speculative code paths | Anant Vithal Nori, Prathmesh Kallurkar, Niranjan Soundararajan | 2025-07-15 |
| 12248696 | Techniques to repurpose static random access memory rows to store a look-up-table for processor-in-memory operations | Saurabh Jain, Srivatsa Rangachar Srinivasa, Akshay Krishna Ramanathan, Gurpreet Singh Kalsi, Kamlesh Pillai | 2025-03-11 |
| 12242721 | Methods and apparatus to profile page tables for memory management | Aravinda Prasad, Sandeep Kumar, Andy Rudoff | 2025-03-04 |
| 12216581 | System, method, and apparatus for enhanced pointer identification and prefetching | Stanislav Shwartsman, Anant Vithal Nori, Shankar Balachandran, Elad Shtiegmann, Vineeth Mekkat +2 more | 2025-02-04 |
| 12190114 | Segmented branch target buffer based on branch instruction type | Niranjan Soundararajan, Sr Swamy Saranam Chongala | 2025-01-07 |
| 12189559 | Methods, apparatus, and articles of manufacture to reorder N-dimensional sparse data into groups of data elements that can be collocated in a memory | Anirud Thyagharajan, Prashant Laddha, Om Ji Omer | 2025-01-07 |