Issued Patents 2025
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417577 | Coherency gathering for ray tracing | Gregory Clark | 2025-09-16 |
| 12417122 | Memory allocation for 3-D graphics rendering | — | 2025-09-16 |
| 12412234 | Memory management for multicore 3-D graphics rendering | — | 2025-09-09 |
| 12406425 | Vertex index routing for two level primitive batch binning | Vishrut Vaibhav, Tad Robert Litwiller | 2025-09-02 |
| 12394010 | Pipeline delay elimination with parallel two level primitive batch binning | Ruijin Wu | 2025-08-19 |
| 12321271 | Distributed system level cache | Mark Landers, Ian King, Alistair Goudie | 2025-06-03 |
| 12307577 | Traversing multiple regions of a bounding volume hierarchy in parallel | David William John Pankratz, Daniel James Skinner | 2025-05-20 |
| 12299768 | Multicore master/slave communications | Ian King | 2025-05-13 |
| 12266044 | Data structures, methods and tiling engines for storing tiling information in a graphics processing system | Xile Yang, Robert Brigg | 2025-04-01 |
| 12243119 | Graphics processor | Ian King, Alistair Goudie | 2025-03-04 |
| 12205193 | Device and method of implementing subpass interleaving of tiled image rendering | Ruijin Wu, Kiia Kallio, Jan H. Achrenius, Mika Tuomi | 2025-01-21 |