Issued Patents 2025
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12406186 | Conflict-free, stall-free, broadcast network on chip | Andrew S. Cassidy, Rathinakumar Appuswamy, John V. Arthur, Jun Sawada, Michael Vincent DeBole +2 more | 2025-09-02 |
| 12400109 | Functional synthesis of networks of neurosynaptic cores on neuromorphic substrates | Andrew S. Cassidy, Pallab Datta, Myron D. Flickner | 2025-08-26 |
| 12400112 | Efficient method for VLSI implementation of useful neural network activation functions | Jun Sawada, Myron D. Flickner, Andrew S. Cassidy, John V. Arthur, Pallab Datta +6 more | 2025-08-26 |
| 12387082 | Scheduler for mapping neural networks onto an array of neural cores in an inference processing unit | Pallab Datta, Andrew S. Cassidy, Myron D. Flickner, Hartmut Penner, Rathinakumar Appuswamy +5 more | 2025-08-12 |
| 12260316 | Automatic timing resolution among neural network components | Pallab Datta, Myron D. Flickner | 2025-03-25 |