Issued Patents 2025
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204832 | Logical clock connection in an integrated circuit design | Ali S. El-Zein, Viresh Paruthi, Alvan W. Ng, Benedikt Geukes, Klaus-Dieter Schubert +6 more | 2025-01-21 |
| 12188979 | Error protection analysis of an integrated circuit | Benjamin Neil Trombley, Karl Evan Smock Anderson, Bodo Hoppe, Erica Stuecheli, Shiri Moran +3 more | 2025-01-07 |