Issued Patents 2025
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12334187 | Power reduction in a clock buffer of a memory module based upon memory module topology | Isaac Q. Wang | 2025-06-17 |
| 12334188 | Power reduction in a clock buffer of a memory module based upon memory module speed | Isaac Q. Wang | 2025-06-17 |
| 12315594 | Controlling memory module clock buffer power in a system with a single memory clock per memory module | Isaac Q. Wang | 2025-05-27 |
| 12230360 | Controlling memory module clock buffer power in a system with dual memory clocks per memory module | Isaac Q. Wang | 2025-02-18 |