PA

Puneet Arora

CS Cadence Design Systems: 3 patents #5 of 106Top 5%
📍 Atrauli, TX: #2 of 2 inventorsTop 100%
Overall (2025): #49,886 of 469,880Top 15%
3
Patents 2025

Issued Patents 2025

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
12417029 Memory view for memory module Steven Lee Gregor, Ke Zhang, Mohit Madaan 2025-09-16
12393246 Power consumption estimation of memory under test Mohit Madaan, Norman Robert Card, Carl Wisnesky, II 2025-08-19
12307186 Launch off shift process Subhasish Mukherjee, Sarthak Singhal, Christos Papameletis, Brian Foutz, Krishna Vijaya Chakravadhanula 2025-05-20